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MC33501, MC33503 1.0 V, Rail-to-Rail, Single Operational Amplifiers
The MC33501/503 operational amplifier provides rail-to-rail operation on both the input and output. The output can swing within 50 mV of each rail. This rail-to-rail operation enables the user to make full use of the entire supply voltage range available. It is designed to work at very low supply voltages (1.0 V and ground), yet can operate with a supply of up to 7.0 V and ground. Output current boosting techniques provide high output current capability while keeping the drain current of the amplifier to a minimum. * Low Voltage, Single Supply Operation (1.0 V and Ground to 7.0 V and Ground) * High Input Impedance: Typically 40 fA Input Bias Current * Typical Unity Gain Bandwidth @ 5.0 V = 4.0 MHz, @ 1.0 V = 3.0 MHz * High Output Current (ISC = 40 mA @ 5.0 V, 13 mA @ 1.0 V) * Output Voltage Swings within 50 mV of Both Rails @ 1.0 V * Input Voltage Range Includes Both Supply Rails * High Voltage Gain: 100 dB Typical @ 1.0 V * No Phase Reversal on the Output for Over-Driven Input Signals * Input Offset Trimmed to 0.5 mV Typical * Low Supply Current (ID = 1.2 mA/per Amplifier, Typical) * 600 W Drive Capability * Extended Operating Temperature Range (-40 to 105C)
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5 SOT23-5 (TSOP-5, SC59-5) SN SUFFIX CASE 483 1 xxxYW
5 1
xxx = MC33501 AAA MC33503 = AAB Y = Year W = Work Week
PIN CONNECTIONS
MC33501 Output 1 VCC 2 Non-Inverting Input 3 +5 VEE
* * * * * * * * *
Single Cell NiCd/Ni MH Powered Systems Interface to DSP Portable Communication Devices Low Voltage Active Filters Telephone Circuits Instrumentation Amplifiers Audio Applications Power Supply Monitor and Control Transistor Count: 98
4 Inverting Input
(Top View)
MC33503 Output 1 VEE 2 Non-Inverting Input 3 +5 VCC
4 Inverting Input
(Top View)
ORDERING INFORMATION
Device MC33501SNT1 MC33503SNT1 Package SOT23-5 SOT23-5 Shipping 3000 Tape & Reel 3000 Tape & Reel
(c) Semiconductor Components Industries, LLC, 2002
1
October, 2002 - Rev. 7
Publication Order Number: MC33501/D
MC33501, MC33503
Base Current Boost Inputs Input Stage Buffer with 0 V Level Shift Saturation Detector Output Stage Outputs
Offset Voltage Trim
Base Current Boost
This device contains 98 active transistors per amplifier.
Figure 1. Simplified Block Diagram
MAXIMUM RATINGS
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Supply Voltage (VCC to VEE) VS 7.0 V V V V V s ESD Protection Voltage at any Pin S o ec o o age a a y Human Body Model Voltage at Any Device Pin VESD VDP 2000 000 VS 0.3 Input Differential Voltage Range VIDR VCM tS VCC to VEE VCC to VEE Note 1 150 Common Mode Input Voltage Range Output Short Circuit Duration Maximum Junction Temperature Storage Temperature Range Maximum Power Dissipation TJ C C Tstg PD -65 to 150 Note 1 mW 1. Power dissipation must be considered to ensure maximum junction temperature (TJ) is not exceeded. 2. ESD data available upon request.
Rating
Symbol
Value
Unit
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MC33501, MC33503
DC ELECTRICAL CHARACTERISTICS (VCC = 5.0 V, VEE = 0 V, VCM = VO = VCC/2, RL to VCC/2, TA = 25C, unless
otherwise noted.) Characteristic Input Offset Voltage (VCM = 0 to VCC) VCC = 1.0 V TA = 25C TA = -40 to 105C VCC = 3.0 V TA = 25C TA = -40 to 105C VCC = 5.0 V TA = 25C TA = -40 to 105C Symbol VIO Min Typ Max Unit mV
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-5.0 -7.0 -5.0 -7.0 -5.0 -7.0 DVIO/DT I IIB I VICR - - 0.5 - 0.5 - 0.5 - 8.0 5.0 7.0 5.0 7.0 5.0 7.0 - mV/C nA V
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Input Offset Voltage Temperature Coefficient (RS = 50 W) TA = -40 to 105C Input Bias Current (VCC = 1.0 to 5.0 V) Common Mode Input Voltage Range Large Signal Voltage Gain VCC = 1.0 V (TA = 25C) RL = 10 kW RL = 1.0 kW VCC = 3.0 V (TA = 25C) RL = 10 kW RL = 1.0 kW VCC = 5.0 V (TA = 25C) RL = 10 kW RL = 1.0 kW 0.00004 - 1.0 VEE VCC AVOL kV/V 25 5.0 50 25 50 25 VOH 100 50 500 100 500 200 - - - - - - V
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0.9 0.85 0.85 0.8 2.9 2.8 2.85 2.75 4.9 4.75 4.85 4.7 0.95 0.88 - - 2.93 2.84 - - 4.92 4.81 - - - - - - - - - - - - - -
Output Voltage Swing, High (VID = 0.2 V) VCC = 1.0 V (TA = 25C) RL = 10 kW RL = 600 W VCC = 1.0 V (TA = -40 to 105C) RL = 10 kW RL = 600 W VCC = 3.0 V (TA = 25C) RL = 10 kW RL = 600 W VCC = 3.0 V (TA = -40 to 105C) RL = 10 kW RL = 600 W VCC = 5.0 V (TA = 25C) RL = 10 kW RL = 600 W VCC = 5.0 V (TA = -40 to 105C) RL = 10 kW RL = 600 W
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MC33501, MC33503
DC ELECTRICAL CHARACTERISTICS (continued) (VCC = 5.0 V, VEE = 0 V, VCM = VO = VCC/2, RL to VCC/2, TA = 25C, unless
otherwise noted.) Characteristic Output Voltage Swing, Low (VID = 0.2 V) VCC = 1.0 V (TA = 25C) RL = 10 kW RL = 600 W VCC = 1.0 V (TA = -40 to 105C) RL = 10 kW RL = 600 W VCC = 3.0 V (TA = 25C) RL = 10 kW RL = 600 W VCC = 3.0 V (TA = -40 to 105C) RL = 10 kW RL = 600 W VCC = 5.0 V (TA = 25C) RL = 10 kW RL = 600 W VCC = 5.0 V (TA = -40 to 105C) RL = 10 kW RL = 600 W Symbol VOL Min Typ Max Unit V
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0.05 0.1 0.1 0.15 0.05 0.1 0.1 0.15 0.05 0.15 0.1 0.2 CMR PSR ISC 60 60 0.02 0.05 - - - - - - - - - - - - - - - - dB dB 0.02 0.08 - - 0.02 0.1 - - 75 75
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Power Supply Rejection VCC/VEE = 5.0 V/Ground to 3.0 V/Ground Output Short Circuit Current (Vin Diff = 1.0 V) VCC = 1.0 V Source Sink VCC = 3.0 V Source Sink VCC = 5.0 V Source Sink mA 6.0 10 15 40 20 40 ID - - - - - - 13 13 32 64 40 70 1.2 1.5 1.65 - - - 26 26 60 140 140 140 mA 1.75 2.0 2.25 2.0 2.25 2.5
Common Mode Rejection (Vin = 0 to 5.0 V)
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Power Supply Current (Per Amplifier, VO = 0 V) VCC = 1.0 V VCC = 3.0 V VCC = 5.0 V VCC = 1.0 V (TA = -40 to 105C) VCC = 3.0 V (TA = -40 to 105C) VCC = 5.0 V (TA = -40 to 105C)
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MC33501, MC33503
AC ELECTRICAL CHARACTERISTICS (VCC = 5.0 V, VEE = 0 V, VCM = VO = VCC/2, TA = 25C, unless otherwise noted.)
Characteristic Slew Rate (VS = 2.5 V, VO = -2.0 to 2.0 V, RL = 2.0 kW, AV = 1.0) Positive Slope Negative Slope Gain Bandwidth Product (f = 100 kHz) VCC = 0.5 V, VEE = -0.5 V VCC = 1.5 V, VEE = -1.5 V VCC = 2.5 V, VEE = -2.5 V Gain Margin (RL =10 kW, CL = 0 pF) Symbol SR Min 1.8 1.8 2.0 2.5 3.0 - - - - - - - - Typ 3.0 3.0 3.0 3.5 4.0 6.5 60 Max 6.0 6.0 6.0 7.0 8.0 - - - - - - - - Unit V/ms
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GBW MHz Am fm dB Phase Margin (RL = 10 kW, CL = 0 pF) Deg dB Channel Separation (f = 1.0 Hz to 20 kHz, RL = 600 W) CS 120 200 Power Bandwidth (VO = 4.0 Vpp, RL = 1.0 kW, THD 1.0%) BWP THD kHz % Total Harmonic Distortion (VO = 4.5 Vpp, RL = 600 W, AV = 1.0) f = 1.0 kHz f = 10 kHz Differential Input Resistance (VCM = 0 V) 0.004 0.01 >1.0 2.0 Rin Cin en terraW pF Differential Input Capacitance (VCM = 0 V) Equivalent Input Noise Voltage (VCC = 1.0 V, VCM = 0 V, VEE = Gnd, RS = 100 W) f = 1.0 kHz nV/Hz - 30 - VCC INOffset Voltage Trim IN+ Out VCC VCC Output Voltage Saturation Detector VCC Clamp Body Bias
Figure 2. Representative Block Diagram
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MC33501, MC33503
General Information The MC33501/503 dual operational amplifier is unique in its ability to provide 1.0 V rail-to-rail performance on both the input and output by using a SMARTMOSTM process. The amplifier output swings within 50 mV of both rails and is able to provide 50 mA of output drive current with a 5.0 V supply, and 10 mA with a 1.0 V supply. A 5.0 MHz bandwidth and a slew rate of 3.0 V/ms is achieved with high speed depletion mode NMOS (DNMOS) and vertical PNP transistors. This device is characterized over a temperature range of -40C to 105C. Circuit Information
Input Stage Output Stage
One volt rail-to-rail performance is achieved in the MC33501/503 at the input by using a single pair of depletion mode NMOS devices (DNMOS) to form a differential amplifier with a very low input current of 40 fA. The normal input common mode range of a DNMOS device, with an ion implanted negative threshold, includes ground and relies on the body effect to dynamically shift the threshold to a positive value as the gates are moved from ground towards the positive supply. Because the device is manufactured in a p-well process, the body effect coefficient is sufficiently large to ensure that the input stage will remain substantially saturated when the inputs are at the positive rail. This also applies at very low supply voltages. The 1.0 V rail-to-rail input stage consists of a DNMOS differential amplifier, a folded cascode, and a low voltage balanced mirror. The low voltage cascaded balanced mirror provides high 1st stage gain and base current cancellation without sacrificing signal integrity. Also, the input offset voltage is trimmed to less than 1.0 mV because of the limited available supply voltage. The body voltage of the input DNMOS differential pair is internally trimmed to minimize the input offset voltage. A common mode feedback path is also employed to enable the offset voltage to track over the input common mode voltage. The total operational amplifier quiescent current drop is 1.3 mA/amp.
An additional feature of this device is an "on demand" base current cancellation amplifier. This feature provides base drive to the output power devices by making use of a buffer amplifier to perform a voltage-to-current conversion. This is done in direct proportion to the load conditions. This "on demand" feature allows these amplifiers to consume only a few micro-amps of current when the output stage is in its quiescent mode. Yet it provides high output current when required by the load. The rail-to-rail output stage current boost circuit provides 50 mA of output current with a 5.0 V supply (For a 1.0 V supply output stage will do 10 mA) enabling the operational amplifier to drive a 600 W load. A buffer is necessary to isolate the load current effects in the output stage from the input stage. Because of the low voltage conditions, a DNMOS follower is used to provide an essentially zero voltage level shift. This buffer isolates any load current changes on the output stage from loading the input stage. A high speed vertical PNP transistor provides excellent frequency performance while sourcing current. The operational amplifier is also internally compensated to provide a phase margin of 60 degrees. It has a unity gain of 5.0 MHz with a 5.0 V supply and 4.0 MHz with a 1.0 V supply. Low Voltage Operation The MC33501/503 will operate at supply voltages from 0.9 to 7.0 V and ground. When using the MC33501/503 at supply voltages of less than 1.2 V, input offset voltage may increase slightly as the input signal swings within approximately 50 mV of the positive supply rail. This effect occurs only for supply voltages below 1.2 V, due to the input depletion mode MOSFETs starting to transition between the saturated to linear region, and should be considered when designing high side dc sensing applications operating at the positive supply rail. Since the device is rail-to-rail on both input and output, high dynamic range single battery cell applications are now possible.
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MC33501, MC33503
0 200
Vsat, OUTPUT SATURATION VOLTAGE (mV)
0 VCC
Vsat, OUTPUT SATURATION VOLTAGE (V)
TA = -55C Source Saturation
-0.5 -1.0 TA = 125C TA = 25C
VCC
400 600
600 400 200 0 100 1.0 k
VCC = 5.0 V VEE = 0 V RL to VCC/2 10 k 100 k 1.0 M
1.0 0.5 0 0
Sink Saturation VCC - VEE = 5.0 V 4.0 8.0 TA = -55C 12
TA = 25C
TA = 125C VEE
VEE 10 M
16
20
24
RL, LOAD RESISTANCE (W)
IO, OUTPUT CURRENT (mA)
Figure 3. Output Saturation versus Load Resistance
Figure 4. Drive Output Source/Sink Saturation Voltage versus Load Current
1000 100 IIB, INPUT CURRENT (pA)
100 80 AVOL, GAIN (dB) 60 40 20 0 1.0 VCC = 2.5 V VEE = -2.5 V RL = 10 k 10 100 1.0 k 10 k 100 k 1.0 M 10 M f, FREQUENCY (Hz) Gain Phase Phase Margin = 60 m, EXCESS PHASE (DEGREES) 0 45 90
10 1.0 0.1 0.01
135 180
0.001 0 25 50 75 100 125
TA, AMBIENT TEMPERATURE (C)
Figure 5. Input Current versus Temperature
Figure 6. Gain and Phase versus Frequency
t, TIME (500 ms/DIV)
1.0 V/DIV (mV)
20 mV/DIV
VCC = 0.5 V VEE = -0.5 V ACL = 1.0 CL = 10 pF RL = 10 k TA = 25C
VCC = 2.5 V VEE = -2.5 V ACL = 1.0 CL = 10 pF RL = 600 W TA = 25C
t, TIME (1.0 ms/DIV)
Figure 7. Transient Response
Figure 8. Slew Rate
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MC33501, MC33503
PDmax, MAXIMUM POWER DISSIPATION (mW) 1600 AVOL , OPEN LOOP GAIN (dB) 1400 1200 1000 800 600 400 200 0 -55 -25 0 25 50 75 100 125 SO-8 Pkg DIP Pkg 120 110 100 90 80 70 60 50 40 30 20 -55 VCC = 2.5 V VEE = -2.5 V RL = 600 W -25 0 25 50 75 100 125
TA, AMBIENT TEMPERATURE (C)
TA, AMBIENT TEMPERATURE (C)
Figure 9. Maximum Power Dissipation versus Temperature
120 100 80 60 40 20 0 10
Figure 10. Open Loop Voltage Gain versus Temperature
VO, OUTPUT VOLTAGE (Vpp)
7.0 6.0 5.0 4.0 3.0 2.0 1.0 0 10 VCC = 2.5 V VEE = -2.5 V AV = 1.0 RL = 600 W TA = 25C 100 1.0 k 10 k 100 k 1.0 M
CMR, COMMON MODE REJECTION (dB)
8.0
VCC = 2.5 V VEE = -2.5 V TA = 25C 100 1.0 k 10 k 100 k 1.0 M
f, FREQUENCY (Hz)
f, FREQUENCY (Hz)
Figure 11. Output Voltage versus Frequency
Figure 12. Common Mode Rejection versus Frequency
IISCI, OUTPUT SHORT CIRCUIT CURRENT (mA)
PSR, POWER SUPPLY REJECTION (dB)
140 120 100 80 60 40 20 0 10 VCC = 0.5 V VEE = -0.5 V Either VCC or VEE TA = 25C 100 1.0 k f, FREQUENCY (Hz) 10 k 100 k VCC = 2.5 V VEE = -2.5 V
100 80 60 40
VCC = 2.5 V VEE = -2.5 V TA = 25C
Sink
Source 20 0
0
0.5
1.0
1.5
2.0
2.5
|VS| - |VO| (V)
Figure 13. Power Supply Rejection versus Frequency
Figure 14. Output Short Circuit Current versus Output Voltage
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MC33501, MC33503
IISCI, OUTPUT SHORT CIRCUIT CURRENT (mA) ICC, SUPPLY CURRENT PER AMPLIFIER (mA) 100 80 60 40 20 0 -55 VCC = 2.5 V VEE = -2.5 V Source Sink 2.5 2.0 1.5 1.0 0.5 0 TA = 25C TA = -55C TA = 125C
-25
0
25
50
75
100
125
0
0.5
1.0
1.5
2.0
2.5
TA, AMBIENT TEMPERATURE (C)
VCC, |VEE|, SUPPLY VOLTAGE (V)
Figure 15. Output Short Circuit Current versus Temperature
50 PERCENTAGE OF AMPLIFIERS (%) PERCENTAGE OF AMPLIFIERS (%) 40 30 20 10 0 -50 -40 VCC = 3.0 V VO = 1.5 V VEE = 0 V 60 Amplifiers Tested from 2 Wafer Lots 50 40 30 20 10
Figure 16. Supply Current per Amplifier versus Supply Voltage with No Load
VCC = 3.0 V VO = 1.5 V VEE = 0 V TA = 25C 60 Amplifiers Tested from 2 Wafer Lots
-30
-20
-10
0
10
20
30
40
50
0 -5.0 -4.0 -3.0 -2.0
-1.0
0
1.0
2.0
3.0
4.0
5.0
TCVIO, INPUT OFFSET VOLTAGE TEMPERATURE COEFFICIENT (mV/C)
INPUT OFFSET VOLTAGE (mV)
Figure 17. Input Offset Voltage Temperature Coefficient Distribution
Figure 18. Input Offset Voltage Distribution
THD, TOTAL HARMONIC DISTORTION (%)
THD, TOTAL HARMONIC DISTORTION (%)
10 AV = 1000 1.0 AV = 100 AV = 10 AV = 1.0 0.01 Vout = 0.5 Vpp RL = 600 W 10 100 1.0 k f, FREQUENCY (Hz) VCC - VEE = 1.0 V 10 k 100 k
10 Vout = 4.0 Vpp RL = 600 W 1.0 AV = 1000 AV = 100 AV = 10 0.01 AV = 1.0 0.001 10 100 1.0 k f, FREQUENCY (Hz) VCC - VEE = 5.0 V 10 k 100 k
0.1
0.1
0.001
Figure 19. Total Harmonic Distortion versus Frequency with 1.0 V Supply
Figure 20. Total Harmonic Distortion versus Frequency with 5.0 V Supply
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MC33501, MC33503
VCC - VEE = 1.0 V + Slew Rate VCC - VEE = 5.0 V + Slew Rate GBW, GAIN BANDWIDTH PRODUCT (MHz) 4.0 5.0 4.0 3.0 2.0 1.0 0 -55 VCC - VEE = 5.0 V f = 100 kHz -25 0 25 50 75 100 125
SR, SLEW RATE (V/ s)
3.0
2.0
VCC - VEE = 1.0 V - Slew Rate
VCC - VEE = 5.0 V - Slew Rate
1.0
0 -55
-25
0
25
50
75
100
125
TA, AMBIENT TEMPERATURE (C)
TA, AMBIENT TEMPERATURE (C)
Figure 21. Slew Rate versus Temperature
Figure 22. Gain Bandwidth Product versus Temperature
100 100 80 60 40 20 0 125
60 40 AVOL, GAIN (dB) 20 0 -20 RL = 600 W CL = 0 TA = 25C 100 k 1.0 M f, FREQUENCY (Hz) 10 M VCC - VEE = 1.0 V VCC - VEE = 5.0 V VCC - VEE = 5.0 V VCC - VEE = 1.0 V Fm, PHASE MARGIN ()
60 40 20 0 -55
Phase Margin
Gain Margin -25 0 25 50 75 100
-40 10 k
TA, AMBIENT TEMPERATURE (C)
Figure 23. Voltage Gain and Phase versus Frequency
70 60 Fm, PHASE MARGIN () 50 VCC - VEE = 5.0 V RL = 600 W CL = 100 pF TA = 25C Gain Margin 100 1.0 k 10 k 100 k Phase Margin 70 60 50 40 30 20 10 0 1.0 M 60 50 AV GAIN MARGIN (dB) Fm, PHASE MARGIN () 40 30 20 10 0 3.0
Figure 24. Gain and Phase Margin versus Temperature
60 Phase Margin VCC - VEE = 5.0 V RL = 600 W TA = 25C 50 40 30 20 10 10 30 100 300 1000 0 3000 AV , GAIN MARGIN (dB)
40 30
20
Gain Margin
10 0 10
RT, DIFFERENTIAL SOURCE RESISTANCE (W)
CL, CAPACITIVE LOAD (pF)
Figure 25. Gain and Phase Margin versus Differential Source Resistance
Figure 26. Feedback Loop Gain and Phase versus Capacitive Load
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AV , GAIN MARGIN (dB)
80
VCC - VEE = 5.0 V RL = 600 W CL = 100 pF
MC33501, MC33503
120 CS, CHANNEL SEPARATION (dB) 100 80 60 40 20 0 30 VCC - VEE = 5.0 V RL = 600 W VO = 4.0 Vpp TA = 25C 100 300 10 k 30 k 100 k 300 k AV = 100 AV = 10 VO, OUTPUT VOLTAGE (Vpp) 8.0 RL= 600 W TA = 25C
6.0
4.0
2.0
0
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
f, FREQUENCY (Hz)
VCC, |VEE|, SUPPLY VOLTAGE (V)
Figure 27. Channel Separation versus Frequency
en, EQUIVALENT INPUT NOISE VOLTAGE (nV/ Hz) 70 60 50 40 30 20 10 0 10 100 1.0 k f, FREQUENCY (Hz) 10 k 100 k VCC - VEE = 5.0 V TA = 25C Fm, PHASE MARGIN () 100 80 60 40 20 0
Figure 28. Output Voltage Swing versus Supply Voltage
100 RL = 600 W CL = 0 TA = 25C Phase Margin 80 60 40 Gain Margin 20 0 AV, GAIN MARGIN (dB)
0
1
2
3
4
5
6
7
VCC - VEE, SUPPLY VOLTAGE (V)
Figure 29. Equivalent Input Noise Voltage versus Frequency
Figure 30. Gain and Phase Margin versus Supply Voltage
VCC-VEE, USEABLE SUPPLY VOLTAGE (V)
1.6 AVOL, OPEN LOOP GAIN (dB) AVOL 10 dB RL = 600 W
120 100 80 60 40 20 0 0 1.0 2.0 3.0 4.0 RL = 600 W TA = 25C 5.0 6.0
1.2
0.8
0.4
0 -55
-25
0
25
50
75
100
125
TA, AMBIENT TEMPERATURE (C)
VCC - VEE, SUPPLY VOLTAGE (V)
Figure 31. Useable Supply Voltage versus Temperature
Figure 32. Open Loop Gain versus Supply Voltage
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MC33501, MC33503
RT 470 k
1.0 V CT 1.0 nF + R1a 470 k VCC R1b 470 k R2 470 k fO 1.0 kHz 1.0 Vpp
f+ O R C In TT
1 2 (R 1a ) R R2 1b )
Figure 33. 1.0 V Oscillator
Af Cf 400 pF Rf 100 k fL 0.5 V R2 10 k + C1 80 nF R1 10 k -0.5 V VO fH
1 f+ [ 200 Hz L 2pR C 11 1 [ 4.0 kHz f+ H 2pRC ff R A + 1 ) f + 11 f R2
Figure 34. 1.0 V Voiceband Filter
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MC33501, MC33503
15 V 5.0 V Vref 13 16 4
15 2 3 1
FB
11 MC34025 14
Output A Output B 4.7
4.7
22 k 5 6 470 pF 7 9
8 12 10 0.1
100 k 1.0 k MC33502 3320 1.0 k
From Current Sense
+ -
Provides current sense amplification and eliminates leading edge spike.
Figure 35. Power Supply Application
IO VO Rsense R1 1.0 k + R3 1.0 k
1.0 V
IO R4 1.0 k 435 mA R5 VL 2.4 k RL 75 IL 212 mA
IL 463 mA
DIO/DIL
-120 x 10-6 492 mA
For best performance, use low tolerance resistors.
R2 3.3 k
Figure 36. 1.0 V Current Pump
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MC33501, MC33503
PACKAGE DIMENSIONS
SOT23-5 (TSOP-5, SC59-5) SN SUFFIX CASE 483-01 ISSUE B
D
5 1 2 4 3
S
B
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. DIM A B C D G H J K L M S MILLIMETERS MIN MAX 2.90 3.10 1.30 1.70 0.90 1.10 0.25 0.50 0.85 1.05 0.013 0.100 0.10 0.26 0.20 0.60 1.25 1.55 0_ 10 _ 2.50 3.00 INCHES MIN MAX 0.1142 0.1220 0.0512 0.0669 0.0354 0.0433 0.0098 0.0197 0.0335 0.0413 0.0005 0.0040 0.0040 0.0102 0.0079 0.0236 0.0493 0.0610 0_ 10 _ 0.0985 0.1181
L G A J C 0.05 (0.002) H K M
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MC33501, MC33503
Notes
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MC33501, MC33503
SMARTMOS is a trademark of Motorola, Inc.
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MC33501/D

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